LO-170 — Pack Orders - FTS (IP)

Testing & Quality Report

Forecast to Stock — Intel Products (FTS-IP) Tower
Capability LO-170 · LO Logistics Management Outbound - FTS (IF)

IAO Program · R1 – R5
Generated: May 2026
Sajiv Francis

IAO Architecture Pipeline — Intel Confidential

1. Executive Summary

This report provides the testing and quality status for Forecast to Stock — Intel Products (FTS-IP) — LO-170 Pack Orders - FTS (IP) sourced from JIRA (cached May 2026).

Metric	Value
Total RICEFW Objects	101
Objects with Test Coverage	99 (98%)
Test Cases	0
Pass Rate	0%
Open Defects	1
Critical Defects	2
FUT Avg Completion	98%
Build Avg Completion	86%

2. Test Coverage

2.1 Coverage by RICEFW Type

RICEFW Type	Total Objects	FUT Started	FUT % Avg	Build % Avg
Interface	34	33	97%	100%
Conversion	20	20	100%	35%
Enhancement	35	34	97%	97%
Report	2	2	100%	100%
Form	7	7	100%	100%
Workflow	3	3	100%	100%
Total	101	99	98%	86%

2.2 Test Case Summary

Status	Count	%
Passed	0	0%
Failed	0	0%
Blocked	0	0%
Not Run	0	0%
Total	0	100%

3. Test Execution Status

3.1 Functional Unit Testing (FUT)

Object ID	Type	Description	FUT %	FUT Status	Build %
LOGE1327	E	ECD_Enhancement to retrieve plant det…	90%	In Progress	100%
LOGE0935_IP	E	Fiori App - Shipping Memo	92%	In Progress	100%
FTSI1693	I	Interface for Reporting Scrap of Semi…	100%	Complete	100%
LOGI1584	I	Interface to post inventory in SAP S/…	—	Not Started	100%
FTSE1739	E	Develop Utility for mass change of Pr…	—	Not Started	—

3.2 Integration Testing

Test Scenario	Status	Related RICEFW	Defects

3.3 User Acceptance Testing (UAT)

Test Scenario	Status	Sign-off	Business Owner

4. Defect Analysis

4.1 Defects by Severity

Severity	Open	Resolved	Total
Critical	1	1	2
High	0	1	1
Total	1	2	3

4.2 Defect Aging

Age Bucket	Critical	High	Medium	Low
0–7 days	0	0	0	0
8–14 days	0	0	0	0
15–30 days	0	0	0	0
31–60 days	0	0	0	0
60+ days	1	0	0	0

4.3 Open Defects

Showing 1 open/in-progress defects. 8 resolved defects are in the Resolved Defects Log.

Defect ID	Severity	Summary	Status	Assignee	Days Open
IAODTM-7350	Critical	LOGI1272 (4C1B) Missing Mandatory JMS Parameters	To Do	Bukhari, Saufi	131

5. Sprint Status

Sprint	Start	End	Committed	Completed	Velocity

6. Go-Live Readiness

Criterion	Status	Evidence
All critical defects resolved	❌ 2 open	JIRA defect query
Test pass rate ≥ 95%	⚠️ 0%	JIRA test execution
UAT sign-off obtained	❌ 1 critical blockers	JIRA UAT board
No P0/P1 blockers open	❌ 1 blockers	JIRA issue tracker

Generated by IAO Architecture Pipeline · May 2026 · Intel Confidential